Fabricating process of circuit board with embedded passive component

ABSTRACT

A process for fabricating a circuit board with an embedded passive component is provided. An electrode-patterned layer having electrodes is formed on a surface of a conductive layer. A passive component material is filled in the intervals between the electrodes. The conductive layer and the electrode-patterned layer are laminated to a dielectric layer, wherein the electrode-patterned layer is embedded in the dielectric layer. The conductive layer is patterned to form a circuit layer.

CROSS-REFERENCE TO RELATED APPLICATION

This application is a divisional of an application Ser. No. 11/626,379,filed on Jan. 24, 2007, now allowed, which claims the priority benefitof Taiwan application serial no. 95102753, filed on Jan. 25, 2006. Theentirety of each of the above-mentioned patent applications is herebyincorporated by reference herein and made a part of this specification.

BACKGROUND OF THE INVENTION

1. Field of Invention

The invention relates to a circuit board and a fabricating processthereof. More particularly, the invention relates to a circuit boardwith an embedded passive component and a fabricating process thereof.

2. Description of Related Art

Due to the increasingly greater degree of integration of electronicproducts, circuit layers of circuit boards applied in highly integratedelectronic products have changed from single or double layers to sixlayers, eight layers, or even more than ten layers, so that electronicdevices can be mounted more densely on circuit boards. However, with theincrease of layer counts of circuit boards and the density of the lines,influences to electrical signals transmitted in circuit boards caused byresistance-capacitance delay (RC delay) or cross-talk become more andmore obvious. Therefore, additional passive components must be disposedin limited areas of circuit boards to improve the electrical propertiesthereof.

As described above, besides passive components, various electronicdevices are further arranged in limited layout areas of circuit boards.However, the specified passive components with particular electricalvalues may not completely meet a particular given circuit design.Therefore, it is practical to fabricate passive components directly incircuit boards. Moreover, passive components in circuit boards can alsoadjust the electrical values thereof depending on layout design, circuitboard material selection, and the like.

FIGS. 1A-1E show schema& sectional views of a conventional process forfabricating a circuit board with an embedded passive component. As shownin. FIG. 1A, a first copper foil layer 110 is provided, and a capacitivematerial is coated on the overall first copper foil layer 110, so as toform a capacitive material layer 120. In FIG. 1B, a second copper foillayer 130 is formed on the capacitive material layer 120 in a laminationmanner. In FIG. 1C, the second copper foil layer 130 in FIG. 1Bundergoes a lithographic process and an etching process to form a secondcircuit layer 130′. In FIG. 1D, the capacitive material layer 120 inFIG. 1C undergoes a patterning process, for example, including alithographic process and an etching process, to form a patternedcapacitive material layer 120′. A multilayer circuit board L and adielectric layer 140 are provided, and the structure formed by the aboveprocesses, the multilayer circuit board L, and the dielectric layer 140are laminated, wherein the patterned capacitive material layer 120′ andthe second circuit layer 130′ are embedded in the dielectric layer 140.Further, referring to FIG. 1E, the first copper foil layer 110 undergoesthe patterning process, for example, including a lithographic processand an etching process, to form a first circuit layer 110′. A pluralityof conductive vias (not shown) is formed in the structure formed by theabove processes to electrically connect the multilayer circuit board Land the first circuit layer 110′.

However, only single layer capacitance devices can be fabricated throughconventional circuit board processes, and just one kind of passivecomponent (referred to as a capacitance device herein) can be embeddedin the single layer. Moreover, each capacitance device occupies a largearea, such that the area for accommodating other integrated circuitdevices is relatively reduced.

SUMMARY OF THE INVENTION

In view of the above, the invention is directed to a process forfabricating a circuit board with an embedded passive component forreducing the area occupied by the passive components.

Moreover, the invention is directed to a circuit board with an embeddedpassive component that occupies a small space.

In the invention, a process for fabricating a circuit board with anembedded passive component is provided. The process includes followingsteps. An electrode-patterned layer is formed on a first surface of aconductive layer, wherein the electrode-patterned layer has a pluralityof electrodes. A passive component material is filled in the intervalsbetween the electrodes. The conductive layer and the electrode-patternedlayer are laminated to a dielectric layer, wherein theelectrode-patterned layer is embedded in the dielectric layer. Theconductive layer is patterned to form a first circuit layer.

According to an embodiment of the invention, the step of forming theelectrode-patterned layer comprises forming a patterned photoresistlayer on the first surface of the conductive layer; then performing anelectroplating process to form the electrode-patterned layer; and thenremoving the patterned photoresist layer.

According to an embodiment of the invention, the step of forming thefirst circuit layer comprises forming a patterned photoresist layer on asecond surface of the conductive layer; next performing anelectroplating process to form the first circuit layer; then removingthe patterned photoresist layer; and then removing a part of theconductive layer, such that the electrodes are electrically insulated.

According to an embodiment of the invention, after forming the firstcircuit layer, it further comprises forming a patterned dielectric layeron the first circuit layer, wherein the patterned dielectric layerexposes a part of the first circuit layer, and then, forming a secondcircuit layer on the patterned dielectric layer, wherein the secondcircuit layer is electrically connected to the first circuit layer.

In the invention, a circuit board with an embedded passive component isprovided. The circuit board includes a dielectric layer, anelectrode-patterned layer, a passive component material, and a firstcircuit layer, wherein the electrode-patterned layer is embedded in thedielectric layer, and the electrode-patterned layer has a plurality ofelectrodes. Moreover, a passive component material is filled in theintervals between the electrodes. Furthermore, the first circuit layeris disposed on the dielectric layer and the electrode-patterned layer,and the first circuit layer is electrically connected to theelectrode-patterned layer.

According to an embodiment of the invention, the thickness of theelectrode-patterned layer falls in the range of, for example, 10 μm to100 μm.

According to an embodiment of the invention, the electrodes are, forexample, plate-shaped, and the electrodes are approximatelyperpendicularly embedded in the dielectric layer.

According to an embodiment of the invention, the thickness of thepassive component material is, for example, smaller than or equal tothat of the electrode-patterned layer.

According to an embodiment of the invention, the circuit board with anembedded passive component further comprises, for example, a secondcircuit layer and a patterned dielectric layer disposed between thefirst circuit layer and the second circuit layer, wherein the firstcircuit layer is electrically connected to the second circuit layer.

According to an embodiment of the invention, the dielectric layer is,for example, a prepreg or core layer.

According to an embodiment of the invention, the passive componentmaterial is, for example, resistive or inductive material.

Based on the above, in the invention, a passive component is embedded ina dielectric layer (e.g. prepreg or core layer), and the electrodes ofthe passive component are substantially perpendicular to the dielectriclayer, thus the space occupied by the passive component is significantlyreduced. Moreover, circuit boards fabricated with the circuit boardfabricating process of the invention have high reliability and lowvariance.

In order to make aforementioned and other features and advantages of theinvention comprehensible, embodiments accompanied with figures aredescribed in detail below.

It is to be understood that both the foregoing general description andthe following detailed description are exemplary, and are intended toprovide further explanation of the invention as claimed.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A-1E show schematic sectional views of a conventional process forfabricating a circuit board with an embedded passive component.

FIGS. 2A-2I show schematic sectional views of a process for fabricatinga circuit board with an embedded passive component according to thefirst embodiment of the invention.

FIGS. 2J-2K show schematic sectional views of a process for fabricatinga second circuit layer according to the first embodiment of theinvention.

FIG. 3 shows a schematic top view of a part of means of the circuitboard with an embedded passive component according to the firstembodiment of the invention.

FIGS. 4A-4B show schematic sectional views of a process for fabricatinga circuit board with an embedded passive component according to thesecond embodiment of the invention.

DESCRIPTION OF EMBODIMENTS First Embodiment

FIGS. 2A-2I show schematic sectional views of a process for fabricatinga circuit board with an embedded passive component according to thefirst embodiment of the invention. The fabricating process for thecircuit board of the invention comprises the following steps. In FIG. 2Aand FIG. 2B, a conductive layer 210 is provided, and the conductivelayer 210 is a copper foil or another kind of metal film. A patternedphotoresist layer P1 is formed on a first surface 212 of the conductivelayer 210, wherein the step of forming the patterned photoresist layerP1 comprises forming a photoresist material layer (not shown) on theconductive layer 210 by adhering a photoresist dry film or coating aliquid photoresist. The photoresist material layer is patterned to forma patterned photoresist layer P1, wherein the patterning processcomprises an exposing process and a developing processes.

An electroplating process is performed to form an electrode-patternedlayer 220 on the area without being covered by the patterned photoresistlayer P1, wherein the electrode-patterned layer 220 has a plurality ofelectrodes 222, and the electrodes 222 are substantially perpendicularto the conductive layer 210. The patterned photoresist layer P1 isremoved, wherein the patterned photoresist layer P1 is removed by, forexample, cleaning with an organic solution or an inorganic solution.

However, the method of forming the electrode-patterned layer 220 on theconductive layer 210 is not limited to the above process. For example, athick conductive layer (not shown) can be first provided, and then apart of the thick conductive layer is removed to form theelectrode-patterned layer 220.

Referring to FIG. 2C, a passive component material 224 is filled in theintervals between the electrodes 222, wherein the method for filling thepassive component material 224 may be screen printing. Moreover, thefilled passive component material 224 can be a resistive material, acapacitive material, or an inductive material.

Referring to FIGS. 2D-2E, a dielectric layer 230 is provided, whereinthe dielectric layer 230 is, for example, a core layer or a prepreg, andin the present embodiment, the dielectric layer 230 is a core layer.Then, the conductive layer 210 and the electrode-patterned layer 220 arelaminated to the dielectric layer 230, wherein the electrode-patternedlayer 220 is embedded in the dielectric layer 230.

Referring to FIG. 2F, a patterned photoresist layer P2 is formed on asecond surface 214 of the conductive layer 210, wherein the method offorming the patterned photoresist layer P2 is similar to that of formingthe patterned photoresist layer P1 on the first surface 212. Referringto FIG. 2G, an electroplating process is performed to form a firstcircuit layer 240 on the area without being covered by the patternedphotoresist layer P2. Referring to FIG. 2H, the patterned photoresistlayer P2 is removed, wherein the method of removing the patternedphotoresist layer P2 is similar to that of removing the patternedphotoresist layer P1. Referring to FIG. 2I, a part of the conductivelayer 210 is removed such that the electrodes 222 are electricallyinsulated, wherein the method of removing a part of the conductive layer210 is, for example, performing an etching process for the conductivelayer 210. Thus, the process of fabricating the circuit board 200 issubstantially completed.

However, after FIG. 2E, a part of the conductive layer 210 can bedirectly removed to form the first circuit layer 240 and make theelectrodes 222 electrically insulated from one another. Moreover, whenthe dielectric layer 230 is a core layer, after forming the firstcircuit layer 240, other circuits can be formed by a build-up orlamination method. The build-up method is illustrated as an exampleherein below.

Referring to FIGS. 2J-2K, the schematic sectional views of a process forfabricating a second circuit layer according to the first embodiment ofthe invention are shown. After forming the first circuit layer 240,other circuits are formed with the build-up method. Referring to FIG.2J, more particularly, a patterned dielectric layer 250 is formed on thefirst circuit layer 240, wherein the patterned dielectric layer 250exposes a part of the first circuit layer 240. Moreover, the method offorming the patterned dielectric layer 250 includes, for example,forming a dielectric material layer (not shown) on the first circuitlayer 240 by spin coating, and then performing a patterning process(e.g. including a lithographic and etching process) to form thepatterned dielectric layer 250.

Referring to FIG. 2K, a conductive material layer (not shown) is formedon the patterned dielectric layer 250, wherein the conductive materiallayer can be formed by sputtering or other metal deposition process.Then, a patterning process (e.g. including a lithographic process and anetching process) is performed on the conductive material layer to form asecond circuit layer 260, wherein the second circuit layer 260 iselectrically connected to the first circuit layer 240.

It shall be noted that the above second circuit layer 260 is formed by abuild-up method; however, a lamination method or other methods can beused. Moreover, other circuit layers can be sequentially formed on thesecond circuit layer 260 in accordance with the requirements of design,and the forming method of the circuit layers is described above. Thestructure of the circuit board with an embedded passive component willbe described in detail below.

FIG. 3 shows a schematic top view of a part of means of the circuitboard with an embedded passive component according to the firstembodiment of the invention. Referring to FIG. 2I and FIG. 3, thecircuit board with an embedded passive component 200 comprises adielectric layer 230, an electrode-patterned layer 220, a passivecomponent material 224, and a first circuit layer 240. Theelectrode-patterned layer 220 is embedded in the dielectric layer 230,and the electrode-patterned layer 220 has a plurality of electrodes 222.It can be seen from FIG. 3 that the electrodes 222 of the invention takethe electrode pattern of a capacitance device. However, the electrodes222 can also be the electrode pattern of an inductance device or aresistance device. Moreover, the thickness of the electrode-patternedlayer 220 falls in the range of, for example, 10 μm to 100 μm, and thethickness of the electrode-patterned layer 220 is, for example, largerthan the thickness of the first circuit layer 240.

The passive component material 224 is disposed in the intervals betweenthe electrodes 222, and the thickness of the passive component material224 is, for example, smaller than or equal to the thickness of theelectrode-patterned layer 220. Moreover, the first circuit layer 240 isdisposed on the dielectric layer 230 and the electrode-patterned layer220, and the first circuit layer 240 is electrically connected to theelectrode-patterned layer 220. When the dielectric layer 230 is aprepreg, the structure as shown in FIG. 2I is regarded as a single layercircuit board.

Further, when the dielectric layer 230 is a core layer, the circuitboard with an embedded passive component of the invention furthercomprises, for example, a second circuit layer 260 and a patterneddielectric layer 250 disposed between the first circuit layer 240 andthe second circuit layer 260, and the first circuit layer 240 iselectrically connected to the second circuit layer 260.

Since the electrode-patterned layer 220 is embedded in the dielectriclayer 230, i.e. in the core layer or prepreg, and the electrode 222 issubstantially perpendicular to the dielectric layer 230; compared withthe conventional technology, the area occupied by the passive componentof the invention can be reduced. Moreover, since the passive componentoccupies a smaller area, the circuit board of the invention can beintegrated with other electronic devices or passive components. Further,compared with the conventional technology, the circuit board of theinvention has high reliability and low variance.

Second Embodiment

FIGS. 4A-4B show the schematic sectional views of a process forfabricating a circuit board with an embedded passive component accordingto a second embodiment of the invention. Referring to FIG. 4A, when thedielectric layer 230 is a prepreg, a circuit board 200 is regarded as asingle layer circuit board. Therefore, the circuit board 200 islaminated with other circuit boards. Then, a circuit unit L′ and adielectric layer 350 are provided, wherein the circuit unit L′ is adual-layer circuit board or a multilayer circuit board, and the circuitunit L′ has a circuit layer 360 disposed on the two opposite surfacesthereof respectively.

Referring to FIG. 4B, the circuit board 200 and the circuit unit L′ arelaminated, and the dielectric layer 350 is disposed between the circuitboard 200 and the circuit unit L′. Then, the first circuit layer 240 iselectrically connected to the circuit layer 360 of the circuit unit L′.For example, a plurality of conductive vias (not shown) is formed in thestructure after lamination to electrically connect the first circuitlayer 240 and the circuit layer 360 of the circuit unit L′.

To sum up, the circuit board with an embedded passive component of theinvention at least has the following advantages.

1. In the invention, the electrodes of the passive component areembedded in the dielectric layer, i.e. in the core layer or prepreg, andthe electrodes of the passive components are substantially perpendicularto the dielectric layer. Therefore, compared with the conventionaltechnology, the space occupied by the passive component of the inventionis significantly reduced.

2. The circuit board fabricated by the circuit board fabricating processof the invention has high reliability and low variance, thus themanufacturing cost can be reduced.

3. Various passive components (e.g. resistors, capacitors, or inductors)can be formed in a single layer of the circuit board of the invention inaccordance with the requirements of the design, which is more flexiblein design compared with the conventional technology.

It will be apparent to those skilled in the art that variousmodifications and variations can be made to the structure of theinvention without departing from the scope or spirit of the invention.In view of the foregoing, it is intended that the invention covermodifications and variations of this invention provided they fall withinthe scope of the following claims and their equivalents.

1. A process for fabricating a circuit board with the embedded passive component, the process comprising: forming an electrode-patterned layer on a first surface of a conductive layer, wherein the electrode-patterned layer has a plurality of electrodes; filling a passive component material in the intervals between the electrodes; laminating the conductive layer and the electrode-patterned layer to a dielectric layer, wherein the electrode-patterned layer is embedded in the dielectric layer; and patterning the conductive layer to form a first circuit layer.
 2. The process for fabricating the circuit board with the embedded passive component as claimed in claim 1, wherein the step of forming the electrode-patterned layer comprises: forming a patterned photoresist layer on the first surface of the conductive layer; performing an electroplating process to form the electrode-patterned layer; and removing the patterned photoresist layer.
 3. The process for fabricating the circuit board with the embedded passive component as claimed in claim 1, wherein the step of forming the first circuit layer comprises: forming a patterned photoresist layer on a second surface of the conductive layer; performing an electroplating process to form the first circuit layer; removing the patterned photoresist layer; and removing a part of the conductive layer, such that the electrodes are electrically insulated.
 4. The process for fabricating the circuit board with the embedded passive component as claimed in claim 1, after forming the first circuit layer, further comprising: forming a patterned dielectric layer on the first circuit layer, wherein the patterned dielectric layer exposes a part of the first circuit layer; and forming a second circuit layer on the patterned dielectric layer, wherein the second circuit layer is electrically connected to the first circuit layer. 